This thesis investigates Cierto VCC, a tool for design exploration from Cadence Design Systems Inc. The intention was to find out if VCC can be used to improve the design flow at EMW UN, ASIC Technology and System on Silicon, mainly by creating a model of an existing ASIC design with VCC.
The conclusion is that Cierto VCC is the most mature tool on the market for true design exploration. It is already useful for design exploration. Negative is that there is no support for static analysis, ie. data collection and analysis of the model without running a simulation. VCC will surely become useful for IP sharing and formal descriptions of complex digital systems. The gap between the executable system models in VCC and hardware implementation tools is also closing rapidly.
Author: Gustafsson, Carl
Source: Luleå University of Technology
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